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AVP32F08 | AVP32F08 (CPU+FPU) series belong to ADP32Fx digital signal controller (DSP) platform. The ADP32x+FPU based controller and the existing ADP32FxDSP of Adchip have the same 32-bit fixed-point architecture, but also include a single precision (32-bit) IEEE754 floating point unit (FPU). This is a very efficient C/C++engine, which enables users to develop their system control software in high-level languages and arithmetic algorithms in C/C++. This device can also process the system control tasks originally handled by the microcontroller, so it is equally effective in processing DSP arithmetic tasks and system control tasks. This efficient processing can save many systems from the need for a second processor. The built-in 32x32 bit MAC64 bit processing capability enables the controller to effectively handle higher digital resolution computing problems. Fast interrupt response with automatic environment saving of key registers enables a device to process many asynchronous events with minimum delay. There is also a built-in 8-level depth protected pipeline with pipelined memory access. The pipelining operation enables the device to be executed at high speed without the need for expensive high-speed memory. In particular, branch ahead hardware greatly reduces the delay caused by conditional discontinuity. The special storage condition operation further improves the performance. | High performance static CMOS technology | Up to 100MHz (10ns cycle time) |
1.8V to 1.5V core, 3.3V I/O design | |||
High performance 32-bit CPU | IEEE-754 Single Precision Floating Point Unit (FPU) | ||
16 x 16 and 32 x 32 multiply add (MAC) | |||
16 x 16 double multiply add | |||
Harvard bus architecture | |||
Fast interrupt response and handling | |||
Unified Memory Programming Model | |||
6-channel DMA processor (for ADC, McBSP, ePWM, XINTF and SARAM) | / | ||
Chip memory | 256K×16Flash Memory,34K×16 SARAM | ||
1K x 16 OTP ROM | |||
Boot ROM (8K X 16) | Support software boot mode (through SCI, SPI, CAN, I2C, McBSP, XINTF and parallel I/O) | ||
Standard mathematical table | |||
Clock and system control | Support dynamic phase-locked loop (PLL) ratio change | ||
Chip oscillator | |||
Watchdog timer module | |||
GPIO0 to GPIO34 pins can be connected to one of eight external kernel interrupts | / | ||
Peripheral interrupt expansion (PIE) block that can support all 58 peripheral interrupts | / | ||
128 bit security key/lock | Protect flash/OTP/RAM modules | ||
Prevent firmware reverse engineering | |||
Low power consumption mode and power saving mode | Support IDLE, STANDBY and HALT modes | ||
Byte order: small endian order | Up to 16 Pulse Width Modulated (PWM) outputs | ||
Up to 6 micro edge positioning (MEP) devices supporting 150ps resolution | |||
High resolution pulse width modulator (HRPWM) output | Up to 6 event capture inputs | ||
Up to 2 orthogonal encoder interfaces | |||
8 32-bit timers (6 eCAPs, 2 eQEPs) | |||
9 16 bit timers (6 ePWM, 3 XINTCTR) | |||
Three 32-bit CPU timers | / | ||
Serial port peripherals | 2 CAN modules | ||
2 SCI (UART) modules | |||
2 McBSP modules (McBSP-A/B can be configured as SPI) | |||
1 SPI module | |||
1 internal integrated circuit (I2C) bus | |||
12 bit analog-to-digital converter (ADC), 16 channels | 12 bit - (267ns conversion time @ 7.5MHz ADC_CLK) | ||
16 channels (2 x 8 input multiplexing) | |||
2 Sample Holds | |||
Sequential/concurrent conversion mode | |||
Internal or external benchmark | |||
35 GPIO pin | / | ||
JTAG boundary scan support | / | ||
Advanced Simulation Features | Analysis and breakpoint functions | ||
Hardware real-time debugging | |||
Development support | ANSI C/C++Compiler/Assembly Language/Connector | ||
Code Composer Studio | |||
Digital motor control and digital power software library | |||
ESD:2000V | / | ||
Packaging Options | LQFP100 | ||
Temperature Options | S1: - 55 ° C to 125 ° (screening) | ||
AVP32F335 | AVP32F335 is a high-performance 32-bit floating point digital processor. High precision, low cost, low power consumption, high performance, high peripheral integration, large data and program storage, and more accurate and fast A/D conversion. It can be widely used in industrial control, variable frequency servo, motor drive, photovoltaic system, mechanical control and other fields. | High performance static CMOS technology | Up to 150MHz (6.67ns cycle time) |
1.9V/1.8V to 1.5V core, 3.3V I/O design | |||
High performance 32-bit CPU | IEEE-754 Single Precision Floating Point Unit (FPU) | ||
16 x 16 and 32 x 32 Media Access Control (MAC) operations | |||
16 x 16双MAC | |||
Harvard bus architecture | |||
Fast interrupt response and handling | |||
Unified Memory Programming Model | |||
Efficient code (using C/C++and assembly language) | |||
6-channel DMA processor (for ADC, McBSP, ePWM, XINTF and SARAM) | / | ||
16 bit or 32-bit external interface (XINTF) | More than 2M × 16 Address range | ||
Chip memory | 256K×16Flash Memory,34K×16 SARAM | ||
1K x 16 OTP ROM | |||
Boot ROM (8K X 16) | Support software boot mode (through SCI, SPI, CAN, I2C, McBSP, XINTF and parallel I/O) | ||
Standard mathematical table | |||
Clock and system control | Support dynamic phase-locked loop (PLL) ratio change | ||
Chip oscillator | |||
Safety device timer module | |||
GPIO0 to GPIO63 pins can be connected to one of eight external kernel interrupts | / | ||
Peripheral interrupt expansion (PIE) block that can support all 58 peripheral interrupts | / | ||
128 bit security key/lock | Protect flash/OTP/RAM modules | ||
Prevent firmware reverse engineering | |||
Low power consumption mode and power saving mode | Support IDLE, STANDBY and HALT modes | ||
Byte order: small endian order | |||
Enhanced control peripherals | Up to 18 Pulse Width Modulated (PWM) outputs | ||
Up to 6 high-resolution pulse width modulator (HRPWM) outputs supporting 150ps micro boundary positioning (MEP) resolution | |||
Up to 6 event capture inputs | |||
Up to two orthogonal encoder interfaces | |||
Up to 8 32-bit timers (6 eCAPs and 2 eQEPs) | |||
Up to 9 32-bit timers (6 ePWMs and 3 XINTCTR) | |||
Three 32-bit CPU timers | / | ||
Serial port peripherals | Up to 2 CAN modules | ||
Up to 2 McBSP modules (configurable as SPI) | |||
One SPI module | |||
An internal integrated circuit (I2C) bus | |||
12/16 bit analog-to-digital converter (ADC), 16 channels | 12 bit - 267ns conversion rate | ||
2 x 8-channel input multiplexer | |||
Two Sample Holds | |||
Single/synchronous conversion | |||
Internal or external benchmark | |||
8-channel LDC inductive sensor | / | ||
8-channel CMP (comparator) | / | ||
Up to 88 individually programmable multiplexed general-purpose input/output (GPIO) pins with input filtering | / | ||
JTAG boundary scan support | / | ||
Advanced Simulation Features | Analysis and breakpoint functions | ||
Real time debugging with hardware | |||
Development support includes | ANSI C/C++Compiler/Assembly Language/Connector | ||
Code Composer Studio™ IDE | |||
DSP/BIOS™ | |||
Digital motor control and digital power software library | |||
Packaging Options | LQFP176 | ||
BGA176 | |||
Temperature Options | A: - 40 ° C to 85 ° C | ||
S:-40°C to 125° |
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