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ADP16F06 | ADP16F06 realizes a low-cost and low-power inverter implementation scheme with a new high-performance CMOS process. The chip adopts 16 bit DSP core, based on Haval bus architecture, and realizes 16 bit x 16 bit multiplication and accumulation (MAC) operation, 4-level pipeline parallel processing. With the fast interrupt response and processing, the processing performance of the chip is greatly improved. The chip integrates two digital motor control output modules, each module flexibly outputs 3-phase motor control PWM; The minimum conversion time of high-performance 12 bit analog-to-digital converter (ADC) is 100ns, which can provide up to 16 channels of analog input. The automatic sorting function of ADC allows multiple conversions in a single conversion session without any CPU overhead. It integrates the serial communication interface (SCI) function to provide asynchronous communication for other devices in the system. For systems that require additional communication interfaces, ADP16F06 provides a synchronous serial peripheral interface (SPI), which can use the boot mode of external SPI Flash to dynamically update the execution program. To maximize device flexibility, function pins can also be configured as general-purpose input/output (GPIO). The 1.8v core LDO in the chip realizes the single power supply mode of a single chip. | High performance CMOS process | Operating frequency 50MHz |
Low power consumption design (core 1.8V, I/O voltage 3.3V | |||
Integrated 1.8V linear regulated power supply (LDO) | |||
Support JTAG online simulation | / | ||
High performance 16 bit CPU | Single cycle 16 bit x16 bit multiply accumulate (MAC) operation | ||
Harvard bus architecture | |||
Fast interrupt response and handling | |||
Efficient programming with C/C++and assembly language | |||
Chip memory resource | B0 and B1: 2 256x 16 bit DARAM | ||
B2: 32x16 bit DARAM | |||
I0:2K x 16 bit SARAM | |||
E0:6K x 16 bit SARAM | |||
32Kx16 bit Flash | |||
Clock and system control | Support dynamic phase-locked loop (PLL) frequency division coefficient adjustment | ||
On-chip oscillator | |||
Watchdog timer | |||
2 external interrupt interfaces | / | ||
Peripheral interrupt expansion block (PIE) supporting 48 peripheral interrupts | / | ||
Motor control peripheral (PWM generation circuit) | Event Manager 1 (EM1), Event Manager 2 (EM2) | ||
They include: 2 16 bit timers, 6 numerical comparators/PWM outputs, 3 capture units, and 1 orthogonal encoding circuit. | |||
Serial port peripherals | Serial Peripheral Interface (SPI) | ||
Serial communication interface (SCI), compatible with UART standard | |||
CAN controller | |||
10 bit 16 channel analog-to-digital converter (ADC) | 2 x 8-channel input multiplexer | ||
Two sample and hold circuits | |||
Single/synchronous conversion | |||
Fast conversion rate: 250ns/4MSPS | |||
40 general purpose I/O (GPIO) pins | / | ||
Advanced simulation functions | Analysis and breakpoint functions | ||
Hardware based real-time debugging | |||
development tool | ANSI C/C++Compiler/Assembly Language/Connector | ||
supportCode Composer Studio™ IDE | |||
supportDSP/BIOS™ | |||
JTAGsimulator | |||
Low power consumption mode and power saving mode | IDLE, STANDBY and HALT modes are supported | ||
The independent peripheral clock can be disabled | |||
Strong ESD protection capability | ESD human body mode (HBM):+4000V/- 4000V | ||
ESD machine mode (MM):+400V/- 400V | |||
Latch up trigger current: 400mA | |||
Packaging Options | LQFP100 | ||
Product grade | C:Consumption grade | ||
G:Industrial grade | |||
ADP16F01 | ADP16F01 adopts enhanced DSP architecture design to achieve low cost, low power consumption and high performance processing capability. Several advanced peripherals optimized for digital motor and motion control applications are integrated to provide a true single chip DSP controller. ADP16 series provides up to 32K x 16bit flash memory devices, providing cost-effective reprogrammable solutions for mass production. The device provides an event manager module, which is optimized for digital motor control and power conversion applications. Functions include center and (or) edge aligned PWM generators, programmable deadband to prevent through faults, and synchronous analog-to-digital conversion. The high-performance 12 bit analog-to-digital converter (ADC) has a minimum conversion time of 500ns and can provide up to 15 channels of analog input (the other A3 channels are used for internal temperature sensors). The automatic sorting function of ADC allows up to 16 conversions in a single conversion session without any CPU overhead. The function of integrated serial communication interface (SCI) provides asynchronous communication for other devices in the system, as well as online programming scheme of SCI. For systems requiring additional communication interfaces, ADP16F01 provides a 16 bit synchronous serial peripheral interface (SPI). To maximize device flexibility, function pins can also be configured as general-purpose input/output (GPIO). | High performance CMOS process | Operating frequency 40MHz |
Low power consumption design (1.8V core, 3.3V I/O voltage) | |||
Integrated 1.8V linear regulated power supply (LDO) | |||
Support JTAG online simulation | / | ||
High performance 16 bit CPU | Single cycle 16 bit x16 bit multiply accumulate (MAC) operation | ||
Harvard bus architecture | |||
Fast interrupt response and handling | |||
Efficient programming with C/C++and assembly language | |||
Chip memory resource | B0和B1:2block256x 16位DARAM | ||
B2: 32x16 bit DARAM | |||
I0:2K x 16 bit SARAM | |||
32Kx16 bit Flash | |||
512x 16 bit ROM | |||
Clock and system control | Support dynamic phase-locked loop (PLL) frequency division coefficient adjustment | ||
On-chip oscillator | |||
Watchdog timer | |||
2 external interrupt interfaces | / | ||
Support serial port SCI boot program burning | / | ||
Peripheral interrupt expansion block (PIE) supporting 29 peripheral interrupts | / | ||
Motor control peripheral (PWM generation circuit) | Event Manager 1 (EM1) | ||
Including: 2 16 bit timers, 7 numerical comparators/PWM outputs, 3 capture units, and 1 group of orthogonal encoding units. | |||
Serial port peripherals | Serial Peripheral Interface (SPI) | ||
Serial communication interface (SCI), compatible with UART standard | |||
12 bit 16 channel analog-to-digital converter (ADC) | 2 x 8-channel input multiplexer | ||
Two sample and hold circuits | |||
Single/synchronous conversion | |||
Fast conversion rate: 300ns/3.33MSPS | |||
4 on-chip operational amplifiers | / | ||
5 voltage comparators | / | ||
Temperature sensor | / | ||
23 general purpose I/O (GPIO) pins | / | ||
8 multiplexed digital input channels | / | ||
Advanced simulation functions | Analysis and breakpoint functions | ||
Hardware based real-time debugging | |||
development tool | ANSI C/C++Compiler/Assembly Language/Connector | ||
Support Code Composer Studio ™ IDE | |||
Supports DSP/BIOS ™ | |||
JTAG Emulator | |||
Low power consumption mode and power saving mode | IDLE, STANDBY and HALT modes are supported | ||
The independent peripheral clock can be disabled | |||
Strong ESD protection capability | ESD human body mode (HBM):+2000V/- 2000V | ||
ESD machine mode (MM):+400V/- 400V | |||
Latch up trigger current: 400mA | |||
Packaging Options | LQFP48 | ||
temperature range | S0:(-20°C~125°C) |
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